As field effect transistors (“FET”), such as metal-oxide semiconductor FETs (“MOSFET”), are scaled down in size, semiconductor manufactures have utilized gate dielectrics having a high dielectric constant (“high-k”) to improve FET performance and reliability. High-k gate dielectrics are desirable in small feature size technologies since conventional gate dielectrics, such as silicon dioxide (“SiO2”), are too thin and they result in high tunneling current, as well as other problems, which decrease performance and reliability of FETs. High-k dielectrics, such as hafnium oxide (“HfO”) and zirconium oxide (“ZrO”), have a dielectric constant equal to approximately 24, while SiO2 has a dielectric constant equal to approximately 4. As a result, the equivalent oxide thickness (“EOT”) for HfO and ZrO is approximately ⅙ of the thickness of SiO2. By way of background, “EOT” refers to the thickness of any dielectric scaled by the ratio of its dielectric constant to the dielectric constant of SiO2. Thus, by utilizing high-k gate dielectrics, semiconductor manufactures can achieve FETs having desirably thin gate dielectrics having a thickness that is equivalent to a much greater thickness of SiO2. However, conventional processes for fabricating FETs having high-k gate dielectrics can cause an undesirable increase in interfacial oxide thickness and carrier mobility degradation in the channel region.
In a conventional process for fabricating a FET having a high-k dielectric, a high-k dielectric, such as HfO or ZrO, is formed over a channel region of a silicon substrate. The high-k dielectric comprises a high-k element, such as Hf or Zr, which is combined with oxygen. However, excessive oxygen from the high-k dielectric combines with silicon on the surface of the silicon substrate to form a low-quality interfacial oxide layer between the silicon substrate and the high-k dielectric. The resulting low-quality interfacial oxide layer causes an undesirable increase in thickness of the gate dielectric, which includes the high-k dielectric and the low-quality interfacial oxide layer. Additionally, the high-k element in the high-k gate dielectric can diffuse into the channel region and, thereby, cause undesirable carrier mobility degradation.
Thus, there is a need in the art for a method for fabricating a high-k gate dielectric in a field effect transistor without causing an undesirable increase in gate dielectric thickness or carrier mobility degradation.